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| syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 1 product list SM8958AL25, 25mhz 32kb internal flash mcu sm8958al33, 33mhz 32kb internal flash mcu sm8958ac25, 25mhz 32kb internal flash mcu sm8958ac40, 40mhz 32kb internal flash mcu description the sm8958a is an 8-bit sing le chip micro controller with 32kb on-chip flash and 1k byte ram embedded. it is a derivative of the 8052 micro controller family. it has 5-channel spwm build-in. with its hardware features and powerful instruction set, it?s straight forward to make it a versatile and cost effective controller for those applications which demand up to 32 i/o pins for pdip package or up to 36 i/o pins for plcc/qfp package, or applic ations which need up to 32k byte flash memory for program data. to program the on-chip flash memory, a commercial writer is available to do it in para llel programming method. ordering information yymmv sm8958aihhkl yy: year, ww: month v: version identifier{ , a, b,?} i: process identif ier {l=3.0v~3.6v,c=4.5v~ 5.5v} hh: working clock in mhz {25, 40} k: package type postfix {as below table} l:pb free identifier {no text is non-pb free p is pb free} postfix package pin / pad configuration dimension p 40l pdip page 2 page 20 j 44l plcc page 2 page 21 q 44l qfp page 2 page 22 features z working voltage: 3.0v ~ 3.6v for l version. 4.5v ~ 5.5v for c version. z general 8052 family compatible z 12 clocks per machine cycle z 32k byte on chip program flash z 1024 byte on-chip data ram z three 16 bit timers/counters z one watch dog timer z four 8-bit i/o ports for pdip package z four 8-bit i/o ports + one 4-bit i/o ports for plcc or qfp package z full duplex serial channel z bit operation instruction z industrial level z 8-bit unsigned division z 8-bit unsigned multiply z bcd arithmetic z direct addressing z indirect addressing z nested interrupt z two priority level interrupt z a serial i/o port z power save modes: idle mode and power down mode z code protection function z low emi (inhibit ale) z 5 channel spwm function with p1.3 ~ p1.7 taiwan 6f, no.10-2 li- hsin 1st road , science-based industrial park, hsinchu, taiwan 30078 tel: 886-3-567-1820 886-3-567-1880 fax: 886-3-567-1891 886-3-567-1894
syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 2 pin configuration syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 3 block diagram syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 4 pin description 40l pdip pin# 44l qfp pin# 44l plcc pin# symbol active i/o names 1 40 2 p1.0/t2 i/o bit 0 of port 1 & timer 2 clock out 2 41 3 p1.1/t2ex i/o bit 1 of port 1 & timer 2 control 3 42 4 p1.2 i/o bit 2 of port 1 4 43 5 p1.3/spwm0 i/o bit 3 of port 1 & spwm channel 0 5 44 6 p1.4/spwm1 i/o bit 4 of port 1 & spwm channel 1 6 1 7 p1.5/spwm2 i/o bit 5 of port 1 & spwm channel 2 7 2 8 p1.6/spwm3 i/o bit 6 of port 1 & spwm channel 3 8 3 9 p1.7/spwm4 i/o bit 7 of port 1 & spwm channel 4 9 4 10 res h i reset 10 5 11 p3.0/rxd i/o bit 0 of port 3 & receiver data 11 7 13 p3.1/txd i/o bit 1 of port 3 & transmit data 12 8 14 p3.2/#int0 l/- i/o bit 2 of port 3 & low true interrupt 0 13 9 15 p3.3/#int1 l/- i/o bit 3 of port 3 & low true interrupt 1 14 10 16 p3.4/t0 i/o bit 4 of port 3 & timer 0 15 11 17 p3.5/t1 i/o bit 5 of port 3 & timer 1 16 12 18 p3.6/#wr i/o bit 6 of port 3 & ext. memory write 17 13 19 p3.7/#rd i/o bit 7 of port 3 & ext. memory read 18 14 20 xtal2 o crystal out 19 15 21 xtal1 i crystal in 20 16 22 vss sink voltage, ground 21 18 24 p2.0/a8 i/o bit 0 of port 2 & bit 8 of ext. memory address 22 19 25 p2.1/a9 i/o bit 1 of port 2 & bit 9 of ext. memory address 23 20 26 p2.2/a10 i/o bit 2 of port 2 & bit 10 of ext. memory address 24 21 27 p2.3/a11 i/o bit 3 of port 2 & bit 11 of ext. memory address 25 22 28 p2.4/a12 i/o bit 4 of port 2 & bit 12 of ext. memory address 26 23 29 p2.5/a13 i/o bit 5 of port 2 & bit 13 of ext. memory address 27 24 30 p2.6/a14 i/o bit 6 of port 2 & bit 14 of ext. memory address 28 25 31 p2.7/a15 i/o bit 7 of port 2 & bit 15 of ext. memory address 29 26 32 #psen o program storage enable 30 27 33 ale o address latch enable 31 29 35 #ea l i external access 32 30 36 p0.7/ad7 i/o bit 7 of port 0 & data/address bit 7 of ext. memory 33 31 37 p0.6/ad6 i/o bit 6 of port 0 & data/address bit 6 of ext. memory 34 32 38 p0.5/ad5 i/o bit 5 of port 0 & data/address bit 5 of ext. memory 35 33 39 p0.4/ad4 i/o bit 4 of port 0 & data/address bit 4 of ext. memory 36 34 40 p0.3/ad3 i/o bit 3 of port 0 & data/address bit 3 of ext. memory 37 35 41 p0.2/ad2 i/o bit 2 of port 0 & data/address bit 2 of ext. memory 38 36 42 p0.1/ad1 i/o bit 1 of port 0 & data/address bit 1 of ext. memory 39 37 43 p0.0/ad0 i/o bit 0 of port 0 & data/address bit 0 of ext. memory 40 38 44 vdd drive voltage, +5 vcc 17 23 p4.0 i/o bit 0 of port 4 28 34 p4.1 i/o bit 1 of port 4 39 1 p4.2 i/o bit 2 of port 4 6 12 p4.3 i/o bit 3 of port 4 syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 5 special function register (sfr) the address $80 to $ff can be access ed by direct addressing mode only. address $80 to $ff is sfr area. the following table lists the sfrs which are identical to general 8052, as well as sm8958a extension sfrs. special function register (sfr) memory map $f8 $ff $f0 b $f7 $e8 $ef $e0 acc $e7 $d8 p4 $df $d0 psw $d7 $c8 t2con t2mod rcap2l rcap2h tl2 th2 $cf $c0 $c7 $b8 ip sconf $bf $b0 p3 $b7 $a8 ie spwmd4 $af $a0 p2 spwmc spwmd0 spwmd1 spwmd2 spwmd3 $a7 $98 scon sbuf p1con wdtc $9f $90 p1 wdtkey $97 $88 tcon tmod tl0 tl1 th0 th1 $8f $80 p0 sp dpl dph rcon pcon $87 note: the text of sfrs with bold type characters are extension sp ecial function registers for sm8958a addr sfr reset 7 6 5 4 3 2 1 0 85h rcon 00h rams1 rams0 97h wdtkey 00h wdtkey7 wdtkey6 wdtkey5 wdt key4 wdtkey3 wdtkey2 wdtkey1 wdtkey0 9bh p1con 00000*** spwme4 spwme3 spwme2 spwme1 spwme0 9fh wdtc 0*0**000 wdte clear ps2 ps1 ps0 a3h spwmc ******00 spfs1 spfs0 a4h spwmd0 00h spwmd04 spwmd03 spwmd02 spwmd01 spwmd00 brm02 brm01 brm00 a5h spwmd1 00h spwmd14 spwmd13 spwmd12 spwmd11 spwmd10 brm12 brm11 brm10 a6h spwmd2 00h spwmd24 spwmd23 spwmd22 spwmd21 spwmd20 brm22 brm21 brm20 a7h spwmd3 00h spwmd34 spwmd33 spwmd32 spwmd31 spwmd30 brm32 brm31 brm30 ach spwmd4 00h spwmd44 spwmd43 spwmd42 spwmd41 spwmd40 brm42 brm41 brm40 bfh sconf 0*****00 wdr ome alei c8h t2con 00h tf2 exf2 rclk tclk exen2 tr2 c/t2 cp/rl2 c9h t2mod ******00 t2oe dcen d8h p4 ****1111 p4.3 p4.2 p4.1 p4.0 syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 6 extension function description 1. memory structure the sm8958a is the general 8052 hardware core as a single chip micro controller. its memory structure follows general 8052 structure. 1.1 program memory the sm8958a has 32k byte on-chip flash memory which used as general program memory. the address range for the 32k byte is $0000 to $7fff. note: the single flash block address structure for doing as well as program rom flash. 1.2 data memory the sm8958a has 1k bytes on-chip ram, 256 bytes of it ar e the same as general 8052 internal memory structure while the expanded 768 bytes on-chip ram can be accessed by external memory addressing method (by instruction movx). syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 7 1.2.1 data memory - lowe r 128 byte ($00 to $7f) data memory $00 to $ff is the same as 8052. the address $00 to $7f can be accessed by direct and indirect addressing modes. address $00 to $1f is register area. address $20 to $2f is memory bit area. address $30 to $7f is for general memory area. 1.2.2 data memory - higher 128 byte ($80 to $ff) the address $80 to $ff can be accessed by indirect addressing mode . address $80 to $ff is data area. 1.2.3 data memory - expanded 768bytes ($0000 to $02ff) from external address $0000 to $02ff is the on-chip expanded ram area, total 768 bytes. this area can be accessed by external direct addressing mode (by instruction movx): syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 8 internal ram control register (rcon, $85) bit-7 bit-0 unused unused unused unused unused unused rams1 rams0 read / write: - - - - - - r/w r/w reset value: * * * * * * 0 0 sm8958a has 768 byte on-chip ram which can be accessed by external memory addressing method only. (by instruction movx). the address space of instruction movx @rn is determined by bit 1 and bit 0 (rams1, rams0) of rcon. the default setting of rams1, rams0 bits is 00 (page0). rams1 rams0 movx @ri i=0,1 mapping to expended ram address 0 0 $0000 ~ $00ff 0 1 $0100 ~ $01ff 1 0 $0200 ~ $02ff the port 0, port2, port3.6 and port3.7 can be used as general purpose i/o pin while port0 is open-drain structure. system control register (sconf, $bf) bit-7 bit-0 wdr unused unused unused unused unused ome alei read / write: r/w - - - - - r/w r/w reset value: 0 * * * * * 0 0 wdr : watch dog timer reset. when system reset by watch dog timer overflow. wdr will be set to 1, the bit 7 (wdr) of sconf is watch dog timer reset bit. it will be set to 1 when reset signal generated by wdt overflow. user should check wdr bit whenever un-p redicted reset happened. ome : 768 bytes on-chip ram enable bit. the bit 1 (ome) of sconf can enable or disable the on-chip expanded 768 byte ram. the default setting of ome bit is 0 (disable). alei : ale output inhibit bit, to reduce emi. setting bit 0 (alei) of sconf can inhibit the clock signal in fosc/6hz output to the ale pin. syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 9 1.3 i/o pin configuration the ports 1, 2 and 3 of standard 8051 have internal pull- up resistor, and port 0 has open-drain outputs. each i/o pin can be used independently as an input or an output. for i/o ports to be used as an input pin, the port bit latch must contain a ?1? which turns off the output driver fet. then for port 1, 2 and 3 port pin is pulled high by a weak internal pull-up, and can be pulled low by an external source. the po rt 0 has open-drain outputs which means its pull-ups are not active during normal port operation. writing ?1? to the port 0 bit latch w ill causing bit floating so that it can be used a s a high-impedance input. the port 4 used as gpio will has the sa me function as port 1, 2 and 3. 2. port 4 for plcc or qfp package : the bit addressable port 4 is available with plcc or qf p package. the port 4 has only 4 pins and its port address is located at 0d8h. the function of port 4 is the sa me as the function of port 1, port 2 and port 3. port4 (p4, $d8) bit-7 bit-0 unused unused unused unused p4.3 p4.2 p4.1 p4.0 read / write: - - - - r/w r/w r/w r/w reset value: * * * * 1 1 1 1 the bit 3, bit 2, bit 1, bit 0 output the setting to pin p4.3, p4.2, p4.1, p4.0 respectively. 3.watch dog timer the watch dog timer (wdt) is a 16-bit free-running counter t hat generate reset signal if the counter overflows. the wdt is useful for systems which are su sceptible to noise, power glitches, or electronics discharge which causing software dead loop or runaway. the wdt function can help user software recover from abnormal software condition. the wdt is different from timer0, timer1 and timer2 of general 8052. to prevent a wdt reset can be done by software periodically clearing the wdt counter. user should check wdr bit of sconf register whenever un-predicted reset happened the purpose of the secure procedure is to prevent the wdtc value from being changed when system runaway. syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 10 there is a 250khz rc oscillator embedded in chip. set wdte = ?1? will enable the rc oscillator and the frequency is independent to the system frequency. to enable the wdt is done by setting 1 to the bit 7 (wdte) of wdtc. after wdte set to 1, the 16-bit counter starts to count with the rc oscillator. it will generate a reset signal when overflows. the wdte bit will be cleared to 0 automatically when sm8958a been reset, either hardware reset or wdt reset. to reset the wdt is done by setting 1 to the clear bit of wdtc before the counter ov erflow. this will clear the content of the 16-bit counter and let the count er re-start to count from the beginning. 3.1 watch dog timer registers: watch dog timer registers - wdt control register (wdtc, $9f) bit-7 bit-0 wdte r clear unused unused ps2 ps1 ps0 read / write: r/w - r/w - - r/w r/w r/w reset value: 0 * 0 * * 0 0 0 wdte : watch dog timer enable bit clear : watch dog timer reset bit ps[2:0] : overflow period select bits ps [2:0] overflow period (ms) 000 2.048 001 4.096 010 8.192 011 16.384 100 32.768 101 65.536 110 131.072 111 262.144 watch dog key register - (wdtkey, $97h) bit-7 bit-0 wdt key7 wdt key6 wdt key5 wdt key4 wdt key3 wdt key2 wdt key1 wdt key0 read / write: r/w r/w r/ w r/w r/w r/w r/w r/w reset value: 0 0 0 0 0 0 0 0 syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 11 by default, the wdtc is read only. user need to write values 1eh, e1h sequentia lly to the wdtkey($9 7h) register to enable the wdtc write attribute, that is mov wdtkey, # 1eh mov wdtkey, # 0e1h when wdtc is set, user n eed to write another values e1h, 1eh sequentially to the wdtkey($97h) register to disable the wdtc write attribute, that is mov wdtkey, # 0e1h mov wdtkey, # 1eh watch dog timer register - system control register (sconf, $bf) bit-7 bit-0 wdr unused unused unused unused unused ome alei read / write: r/w - - - - - r/w r/w reset value: 0 * * * * * 0 0 the bit 7 (wdr) of sconf is watch dog timer reset bit. it will be set to 1 when reset signal generated by wdt overflow. user should check wdr bit whenever un-predicted reset happened. 4. reduce emi function the sm8958a allows user to reduce the emi emission by setti ng 1 to the bit 0 (alei) of sconf register. this function will inhibit the clock signal in fosc/6hz output to the ale pin. 5. specific pulse widt h modulation (spwm) the specific pulse width modulation (spwm) module c ontain 1 kind of pwm sub module: spwm (specific pwm). spwm has five 8-bit channels. 5.1 spwm function description: the 8-bit spwm channel is composed of an 8-bit register which contains a 5-bit spwm in msb portion and a 3-bit binary rate multiplier (brm) in lsb portion. the value prog rammed in the 5-bit spwm port ion will determine the pulse length of the output. the 3-bit brm portion will generate and insert certain narrow pulses among an 8-spwm-cycle frame. the number of pulses generated is equal to the num ber programmed in the 3-bit brm portion. the usage of the brm is to generate equivalent 8-bit resolution spwm type dac with reasonably high repetition rate through 5-bit spwm clock speed. the spfs[1:0] settings of spwmc ($ a3) register are dividend of fosc to be spwm clock, fosc/2^(spfs[1:0]+1). the spwm output cycle frame repetiti on rate (frequency) equals (spwm clock)/32 which is [fosc/2^(spfs[1:0]+1)]/32. syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 12 5.2 spwm registers - p1 con, spwmc, spwmd[4:0] spwm registers - port1 configur ation register (p1con, $9b) bit-7 bit-0 spwme4 spwme3 spwme2 spwme1 spw me0 unused unused unused read / write: r/w r/w r/w r/w r/w - - - reset value: 0 0 0 0 0 * * * spwme[4:0] : when the bit set to one, the corresponding spwm pi n is active as spwm function. when the bit reset to zero, the corresponding spwm pin is active as i/o pin. five bits are cleared upon reset. spwm registers -spwm control register (spwmc, $a3 ) bit-7 bit-0 unused unused unused unused unused unused spfs1 spfs0 read / write: - - - - - - r/w r/w reset value: * * * * * * 0 0 spfs[1:0] : these two bits is 2?s power paramete r to form a frequency divider for input clock. spfs1 spfs0 divider spwm clock, fo sc=20mhz spwm clock, fosc=24mhz 0 0 2 10mhz 12mhz 0 1 4 5mhz 6mhz 1 0 8 2.5mhz 3mhz 1 1 16 1.25mhz 1.5mhz spwm registers -spwm data regist er (spwmd[4:0], $ac, $a7 ~$a4 ) bit-7 bit-0 spwmd [4:0]4 spwmd [4:0]3 spwmd [4:0]2 spwmd [4:0]1 spwmd [4:0]0 brm [2:0]2 brm [2:0]1 brm [2:0]0 read / write: r/w r/w r/ w r/w r/w r/w r/w r/w reset value: 0 0 0 0 0 0 0 0 spwmd[4:0] : content of spwm data register. it deter mines duty cycle of spwm output waveform. brm[2:0] : will insert certain narro w pulses among an 8-spwm-cycle frame syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 13 n = brm[2:0] number of spwm cycles inserted in an 8-cycle frame 000 0 001 1 010 2 011 3 100 4 101 5 110 6 111 7 example of spwm timing diagram: mov spwmc , #03h ; set output frequency (divider = 16) mov spwmd0 , #83h ; spwmd0[4:0]=10h (=16t high, 16t low), brm[2:0] = 3 mov p1con , #08h ; enable p1.3 as spwm output pin (narrow pulse inserted by brm0 [2:0] setting, here brm0[2:0]=3) spwm clock = 1 / t = fosc / 2^(spfs[1:0]+1) the spwm output cycle frame frequency = spw m clock / 32 = [fosc/2^(spfs[1:0]+1)]/32 if user use fosc=20mhz, spfs[1:0] of spwmc=#03h, then spwm clock = 20mhz/2^4 = 20mhz/16 = 1.25mhz spwm output cycle frame frequenc y = (20mhz/2^4)/32=39.1khz syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 14 operating conditions symbol description min. typ. max. unit. remarks ta operating temperature -40 25 85 ambient temperature under bias vcc5 supply voltage 4.5 5.0 5.5 v for c version vcc3 supply voltage 3 3.3 3.6 v for l version fosc 25 oscillator frequency 3.0 25 25 mhz for 5v, 3.3v application fosc 40 oscillator frequency 3.0 40 40 mhz for 5v application dc characteristics (ta = -40 degree c to 85 degree c, vcc = 3.0v to 5.5v) symbol parameter valid min. max. unit test conditions vil1 input low voltage port 0,1,2,3,4,#ea -0.5 0.8 v vil2 input low voltage res, xtal1 00.8 v vih1 input high volt age port 0,1,2,3,4,#ea 2.0 vcc+0.5 v vih2 input high voltage res, xtal1 70%vcc vcc+0.5 v vol1 output low voltage port 0, ale, #psen 0.45 v iol=8ma (5v) / iol=6ma (3.3v) vol2 output low vo ltage port 1,2,3,4 0.45 v iol=6.5ma (5v) / iol=5ma (3.3v) 2.4 v ioh=-800ua (only for vcc =5v) voh1 output high voltage port 0 90%vcc v ioh=-80ua 2.4 v ioh=-60ua (only for vcc =5 v) voh2 output high voltag e port 1,2,3,4,ale,#psen 90%vcc v ioh=-10ua iil logical 0 input current port 1,2,3,4 -75 ua vin=0.45v itl logical transition current port 1,2,3,4 -650 ua vin=2.0v ili input leakage current port 0, #ea 10 ua 0.45v syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 16 application reference valid for sm8958a x'tal 3mhz 6mhz 9mhz 12mhz c1 30 pf 30 pf 30 pf 30 pf c2 30 pf 30 pf 30 pf 30 pf r open open open open x'tal 16mhz 25mhz 33mhz 40mhz c1 30 pf 15 pf 5 pf 2 pf c2 30 pf 15 pf 5 pf 2 pf r open 62k ? 6.8k ? 4.7k ? note: oscillation circuit may differs with different crystal or ceramic resonator in higher oscillation frequency which was due to each crystal or ceramic resonator has its own characteristics. user should check with the crystal or ceramic resonator manufacturer for appropriate value of external components. data memory read cycle timing syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 17 program memory read cycle timing data memory write cycle timing syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 18 i/o ports timing timing critical, requirement of external clock (vss=0.0v is assumed) tm.i external program memory read cycle syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 19 tm.ii external data memory read cycle tm.iii external data memory write cycle syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 20 pdip 40l (600mil) package informatio n note: 1. refer to jedec std.ms-011(ac). 2. dimension d and e1 do not include mold protrusion. allowable protrusion is 0.25 mm per side. d and e1 are maximum plastic body size dimension include mold mismatch. 3. dimension b3 does not include dambar protrusion. allowable dambar protrusion shall not cause the lead width to exceed the maximum b3 dimension by more than 0.2mm . dimension in mm dimension in mil symbol min nom max min nom max a1 0.254 10 a2 3.683 3.810 3.937 145 150 155 b 0.356 0.500 0.660 14 20 26 b1 0.356 0.457 0.508 14 18 22 b2 1.016 1.270 1.524 40 50 60 b3 1.016 1.321 1.626 40 52 64 c 0.203 0.254 0.432 8 10 17 c1 0.203 0.254 0.356 8 10 14 d 52.07 52.2 52.32 2050 2055 2060 e 14.99 15.24 15.49 590 600 610 e1 13.69 13.87 13.94 539 546 549 e 2.540 100 eb 15.75 16.26 16.76 620 640 660 l 2.921 3.302 3.683 115 130 145 s 1.727 1.981 2.235 68 78 88 q1 1.651 1.778 1.905 65 70 75 0 10 0 10 syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 21 plcc 44l package informatio n unit symbol inch(ref) mm(base) a 0.180(max) 4.572(max) a1 0.024 0.005 0.52 0.14 a2 0.105 0.005 2.667 0.127 b 0.018 + 0.004 - 0.002 0.457 + 0.102 - 0.051 b1 0.028 + 0.004 - 0.002 0.711 + 0.102 - 0.051 c 0.010(typ) 0.254(typ) d 0.690 0.010 17.526 0.254 d1 0.653 0.003 16.586 0.076 d2 0.610 0.020 15.494 0.508 e 0.690 0.010 17.526 0.254 e1 0.653 0.003 16.586 0.076 e2 0.610 0.010 15.494 0.254 e 0.050(typ) 1.270(typ) y 0.003(max) 0.076(max) 0~5 0~5 syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 22 qfp 44l(10x10x2.0mm) package information note: 1. refer to jedc std.ms-022(ab). 2. dimension e1 do not include mold protrusion. allowable protrusion is 0.25mm per side.e1 are maximum plastic body size dimension include mold mismatch . 3. dimension b does not include dambar protrusion .allowable dambar protrusion shall not cause the lead width to exceed the maximum b3 dimension by more than 0.1 mm. dimension in mm dimension in mil symbol min nom max min nom max a 2.45 964 a1 0.05 0.15 0.25 2.1 6.0 9.6 a2 1.90 2.00 2.10 74.8 78.7 82.7 b 0.29 0.32 0.45 11.4 12.6 17.7 b1 0.29 0.30 0.41 11.4 11.8 16.1 c 0.11 0.17 0.23 4.3 6.7 9.1 c1 0.11 0.15 0.19 4.3 5.9 7.5 e 13.00 13.20 13.40 512 520 528 e1 9.90 10.00 10.10 390 394 398 e 0.800 31.5 l 0.73 0.88 1.03 28.7 34.6 40.6 l1 1.50 1.60 1.70 59.1 63.0 66.9 y 0.076 3 0 7 0 7 syncmos technologies intern ational, inc. sm8958a 8-bits micro-controller with 32kb flash & 1kb ram embedded specifications subject to change without notice contact your sales representati ves for the most re cent information. ver 2.1 sm8958a 08/2006 23 e mcu writer list company contact info programmer model number advantech 7f, no.98, ming-chung rd., shin-tien city, taipei, taiwan, roc web site: http://www.aec.com.tw tel:02-22182325 fax:02-22182435 e-mail: aecwebmaster@advantech.com.tw lab tool - 48xp (1 * 1) lab tool - 848 (1*8) hi-lo 4f, no. 20, 22, ln, 76, rui guang rd., nei hu, taipei, taiwan, roc. web site: http://www.hilosystems.com.tw tel:02-87923301 fax:02-87923285 e-mail: support@hilosystems.com.tw all - 11 (1*1) gang - 08 (1*8) leap 6th f1-4, lane 609, chunghsin rd., sec. 5, sanchung, taipei hsien, taiwan, roc web site: http://www.leap.com.tw tel:02-29991860 fax:02-29990015 e-mail: service@leap.com.tw leap-48 (1*1) su - 2000 (1*8) xeltek electronic co., ltd 338 hongwu road, nanjing, china 210002 web site: http://www.xeltek-cn.com tel:+86-25-84408399, 84543153-206 e-mail: xelclw@jlonline.com, xelgbw@jlonline.com superpro/2000 (1*1) superpro/280u (1*1) superpro/l+(1*1) |
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